The subject matter of this invention relates to computing systems, and more particularly, to a multiple instruction stream, multiple data pipeline for use in a functional unit of such computing system, such as a floating point unit, which is designed to operate in conjunction with a single instruction stream, single data architecture.
Most computer processors utilize some form of pipelining. In a pipelined computer processor, more than one instruction of an instruction stream is being executed at the same time. However, each of the instructions being executed are disposed within different stages of the pipe. The performances of a pipelined processor is necessarily better than the performance of a non-pipelined processor. There are different types of pipelining. One type is termed "single instruction stream single data (SISD)" pipelining. In the SISD type of pipelining, individual instructions are pipelined with at most a single data operation. However, using the SISD pipelining approach, many "hazards" were encountered. Hazards are encountered upon entering the pipeline at a maximum possible new data rate. The "hazards" can be divided in two categories, namely, structural hazards and data dependent hazards. A structural hazard occurs when two pieces of data attempt to use the same hardware and thus collisions occur. Data dependent hazards may occur when the events transpiring in one stage of a pipeline determines whether or not data may pass through another stage of the pipeline. For example, in a pipeline having two stages, each stage requiring use of a single memory, when one stage is using the memory, the other stage must remain idle until the first stage is no longer using the memory. Another type of pipeline approach is termed "multiple instruction stream, multiple data (MIMD)" pipelining. When the MIMD type of pipelining is being used, rather than pipe individual instructions, as in the SISD pipeline approach, instruction "streams" are piped. The MIMD pipeline approach did not encounter the hazards problem. However, although instruction streams are being piped in the MIMD approach, a first instruction stream must complete execution before a second instruction stream could commence execution. Thus, although the performance of the MIMD pipeline was better than the performance of the SISD pipeline, the performance of the MIMD pipeline was limited, by the "one instruction stream at a time" execution philosophy.